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Colossus (Invest Like the Best / Business Breakdowns)Podcast2 Mar 2022Source: joincolossus.comHost: Colossus

Cadence: Software Behind Semiconductor Design - [Business Breakdowns, EP. 49]

In plain words

This piece breaks down Cadence Design Systems, a software company for chip design. The hosts argue Cadence transformed from a cyclical toolmaker into a stable 'tax on chip industry growth' by switching to subscription revenue and reinvesting in R&D—even during three chip downturns, its slowest annual revenue growth was 6%. Key holdings: Cadence (accelerating revenue, high margins); Synopsys (main rival, duopoly); Apple (customer designing its own chips, costs over $500M).

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Cadence Design Systems is a core participant in the semiconductor ecosystem, providing electronic design automation (EDA) software for chip design, enabling modern smartphones to integrate all the functionality of a 1980s Radio Shack. The report, analyzed by Brinton Johns and Jon Bathgate of NZS Cap

~11 min full read · 8 sections
Deep Analysis

Cadence: Software Behind Semiconductor Design - [Business Breakdowns, EP. 49]

At a Glance

NZS Capital's semiconductor specialist investors Brinton Johns and Jon Bathgate break down Cadence Design Systems. Core thesis: Through its transition to a subscription model, optimization of customer structure, and reinvestment in R&D, Cadence has successfully reinvented itself from a cyclical semiconductor tool vendor into a "non-cyclical growth tax on the semiconductor industry" — over the past decade, through three semiconductor downturns, its slowest annual revenue growth still reached 6%.


1. EDA Software: The "Design Operating System" of the Semiconductor Industry

Jon Bathgate argues that EDA software is the "most indispensable yet least understood" layer of the semiconductor ecosystem.

  • Industry Scale and Leverage: The semiconductor industry generates approximately $550 billion in annual revenue, of which about 15% is allocated to R&D, and roughly 15% of that R&D spend goes to EDA tools—resulting in an EDA market of around $100 billion. Cadence accounts for about one-third of that.
  • Value Creation Far Exceeds Value Capture: A $100 billion EDA market underpins a $550 billion semiconductor industry, which in turn supports end markets such as smartphones (~$400 billion), PCs (~$250 billion), automotive, and medical devices. Brinton Johns draws an analogy to "a $100 barrel of oil versus pipeline transportation costs": the "toll fee" charged by EDA is far below the value it creates.
  • Nature of the Tool: EDA software serves as the "productivity platform" for chip design, akin to Microsoft Office in finance or the Adobe suite in creative industries. The final output is a chip blueprint—"a house with 60 billion rooms, each room only one ten-thousandth the width of a human hair."

Unique Insight: Among the world's top ten companies by market capitalization, excluding Saudi Aramco and Berkshire Hathaway, the remaining eight all design their own chips (Berkshire can be considered half, given its stake in Apple). This trend is a structural growth driver for Cadence.


2. From the Brink of Bankruptcy to a "Software Model": Cadence's Self-Reinvention

Jon Bathgate details Cadence's transformation path from the 2008 crisis to the present day.

  • The 2008 Crisis: Under former CEO Mike Pfister (who joined from Intel in 2004), the company suffered from chaotic pricing and excessively long contract terms used to window-dress quarterly results, while simultaneously attempting to acquire Mentor Graphics and pursue a KKR-led privatization. In 2008, the entire management team was purged, the stock price fell below $3, and the industry widely believed that "Cadence might be beyond repair."
  • Lipu Tan's Rescue: Board member and semiconductor VC Lipu Tan stepped in as interim CEO and later assumed the role permanently. Key measures:

1. Transitioned to a subscription revenue recognition model (Cadence and Synopsys were among the first software companies to complete this shift, ahead of Adobe and Autodesk)

2. Aggressively reinvested after stabilizing the business: Leveraging its strengths in analog chips (analog/low-end chips), it launched a major push into the digital chip space, directly challenging Synopsys's "backyard" — winning clients such as NVIDIA, Intel, and Apple

  • Tailwinds from Industry Structural Changes:
  • The massive wave of semiconductor M&A from 2014 to 2017 (hundreds of billions of dollars) raised concerns that rising customer concentration would weaken Cadence's bargaining power. The actual outcome was the opposite: No company cut engineers after M&A (engineers are the core asset of an acquisition), and the industry became healthier overall with more stable R&D spending
  • System companies (Apple, Amazon, Google, Tesla, etc.) aggressively entered chip design. These "starting from scratch" clients relied more heavily on Cadence's IP libraries and tools than traditional chip companies

Data Support: Cadence's revenue growth accelerated from mid-to-high single digits 5-6 years ago to a three-year CAGR of approximately 13%. The share of revenue from system companies rose from 38% a few years ago to about 45%.


3. Business Model: A Non-Cyclical "Chip Design Tax"

Brinton Johns emphasizes that Cadence's greatest moat is the decoupling of its revenue from the semiconductor cycle.

  • Contract Structure: Three-year subscription contracts with revenue recognized straight-line over three years. Customers pay per "seat," with each engineer seat typically costing tens of thousands of dollars per year. 85%-90% of revenue is recurring.
  • Why No Cyclicality: The last thing the semiconductor industry cuts is R&D engineers—eliminating design teams means sacrificing the product pipeline for the next two years. Over the past three down cycles (2011-13, 2015-16, and the US-China trade war through COVID), Cadence's slowest annual revenue growth rate was 6%.
  • Unit Economics:
  • R&D accounts for 35% of revenue—"the largest, most R&D-intensive software company globally"
  • Sales and marketing expenses are far lower than those of growth-stage software companies—customer churn is zero (unless the customer goes out of business)
  • Operating margin approaches 40% (high 30s in the latest reported period), with free cash flow margin in the low 30s
  • Incremental operating margin target is 50%, achieved each year over the past 5-6 years
  • Pricing Evolution: Historically, the EDA industry had extremely poor pricing dynamics—customers would "dangle EDA sales reps" at quarter-end, forcing price cuts. With the subscription model, industry consolidation, and management turnover, pricing has shifted from a headwind to a modest tailwind.

Jon Bathgate's Framework: "EDA is a low-tax extractor on the semiconductor industry—2% of customer revenue, providing indispensable value. Customers have no incentive to build in-house alternatives."


4. Growth Drivers and Risks

Growth Engines

1. Increasing chip design complexity: From 5nm to 3nm, the design cost of a single chip has risen from hundreds of millions of dollars to over $500 million, requiring more engineers and tools.

2. Expanding customer base: Hyperscale cloud vendors (Amazon's chip team grew from 100 to over 1,000), automotive manufacturers (Ford developing in-house chips), and a surge in VC investment (semiconductor VC funding rose from approximately $1 billion six to seven years ago to around $8 billion in recent years).

3. New business lines: IP blocks (already accounting for 15% of revenue, growing at a mid-to-high teens rate), hardware emulation (simulating server racks for $500 million chips), and AI-embedded tools (using deep learning to optimize chip design workflows).

Risks

  • China risk: China accounts for a high-teens percentage of revenue. Geopolitical tensions could lead to a comprehensive ban on Chinese chip companies using U.S. EDA tools (similar to an expansion of the Huawei ban).
  • Open-source alternatives: Companies like Google may open-source parts of EDA tools (similar to the TensorFlow model), eroding marginal revenue.
  • Market share volatility: Ongoing competition between Cadence and Synopsys; AI tool integration capabilities could become a new differentiator.
  • Slowing of Moore's Law: If chip complexity stops increasing, design demand may peak.

Brinton Johns' probability framework: "Cadence is a 'resilience' rather than an 'option' company. The probability of doubling within five years is high, while the probability of a tenfold increase in ten years is about 10%."


Mentioned Positions

Position Analyst View Key Data
Cadence Design Systems Bullish Revenue ~$3B, 3-year CAGR 13%, operating margin ~40%, R&D as % of revenue 35%
Synopsys Neutral (primary competitor) Forms EDA duopoly with Cadence
Apple Neutral (customer case) Acquired PA Semi in 2008, self-developed A-series/M1 chips, chip design cost $500M+
NVIDIA Neutral (customer case) Market cap $500B+, more software engineers than hardware engineers
TSMC Neutral (manufacturing partner) Introduces new node every two years, 5nm chip design cost $500M+
ARM Holdings Neutral (IP supplier) Provides chip architecture IP, failed acquisition by NVIDIA
Mentor Graphics Neutral (historical competitor) Acquired by Siemens in 2015, no longer discloses financials
Google Neutral (potential threat) Self-developed chips (Tensor), may open-source some EDA tools
Ansys Neutral (adjacent field) Fourth-largest EDA player, competes with Cadence in simulation

Judgments Worth Remembering

1. Jon Bathgate on EDA's "low-tax extraction" model: "EDA accounts for 2% of the semiconductor industry's cost but delivers 100% indispensable value. Customers have no incentive to build alternatives in-house—just as you wouldn't build your own Excel." Support: $10 billion EDA market vs. $550 billion semiconductor market.

2. Brinton Johns on Cadence's cyclical decoupling: "Over the three semiconductor downturns in the past decade, Cadence's slowest annual revenue growth was 6%. Chip companies can cut anything, but they will never cut engineers—that would be suicide." Data: Verified across three cycles—2011-13, 2015-16, and the US-China trade war through COVID.

3. Jon Bathgate on the lesson from the 2008 crisis: "When Cadence's stock fell below $3, the industry thought it might not recover. The first thing Lipu Tan did was shift to a subscription model—a decade ahead of Adobe and Autodesk." Mechanism: The subscription model eliminated the vicious pricing cycle where sales reps were 'beaten down' by customers at quarter-end.

4. Brinton Johns on the "non-zero-sum" management philosophy: "Lipu Tan spends a great deal of time understanding customer needs and tells the team, 'You can't solve all problems next quarter, but you can in five years.' The value created far exceeds the value captured." Result: Revenue growth of 13%, incremental margin of 50%.

5. Jon Bathgate on the unexpected upside of semiconductor M&A: "During the hundreds of billions in M&A from 2014-2017, the market feared rising customer concentration. But no one laid off engineers—engineers are the core asset of an acquisition. The industry became healthier, and R&D more stable." Falsification condition: If future M&A leads to engineer layoffs, Cadence's growth thesis will be challenged.

6. Brinton Johns on the "resilience vs. option" framework: "Cadence is a resilience-type stock—high probability of doubling in five years, roughly 10% probability of a tenfold return in ten years. You trade probability for multiples." Application: Suitable as a low-volatility core holding in a portfolio.

7. Jon Bathgate on the structural trend of system companies designing their own chips: "Among the world's top ten companies by market cap, eight design their own chips. The only exceptions are Saudi Aramco and Berkshire Hathaway—and Berkshire can be considered half, given its stake in Apple." Implication: Cadence's customer base continues to expand, and new customers (starting from scratch) rely more heavily on its tools and IP than existing ones.

8. Brinton Johns on the rationale for R&D intensity: "Cadence is the world's largest and most R&D-intensive software company (35%). That's because they are doing two things simultaneously: pushing tools to the next process node (2nm) and embedding AI into the design flow." Payoff: As long as revenue growth stays above 13%, operating margins are expected to rise from ~40% to the mid-40s.